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CUSAT B.Tech Scheme of Examinations & Syllabus 2006 CS Sem IV 1

Posted by Tharadas179 Sunday, July 19, 2009

CUSAT B.Tech Degree Course – Scheme of Examinations & Syllabus 2006 CS Sem IV
1
EB/EC/EE/EI/CE/CS/IT/ME/SE 401 ENGINEERING MATHEMATICS III
Module 1
Complex Analytic functions and conformal mapping: curves and regions in the complex
plane, complex functions, limit, derivative, analytic function, Cauchy - Riemann
equations, Elementary complex functions such as powers, exponential function,
logarithmic, trigonometric and hyperbolic functions. Conformal mapping: Linear
fractional transformations, mapping by elementary functions like Z2, ez, sin z, cos z, sin
hz, and Cos hz, Z+1/Z.
Module 2
Complex integration: Line integral, Cauchy's integral theorem, Cauchy's integral
formula, Taylor's series, Laurent's series, residue theorem, evaluation of real integrals
using integration around unit circle, around the semi circle, integrating contours having
poles, on the real axis.
Module 3
Partial differential equations:Formation of partial differential equations. Solutions of
equations of the form F(p, q) = 0, F(x,p,q)=0, F(y,p,q)=0, F(z,p,q)=0, F1(x,p) = F2 (y,q),
Lagrange’s form Pp+Qq = R. Linear homogeneous partial differential equations with
constant co-effients.
Module 4
Vibrating string : one dimensional wave equation, D’Alembert’s solution, solution by the
method of separation of variables. One dimensional heat equation, solution of the
equation by the method of separation of variables, Solutions of Laplace’s equation over a
rectangular region and a circular region by the method of separation of variables.
Text Books:
1. R.K.Jain, S.R.K.Iyengar: Advanced Engineering Mathematics, Narosa
Publishers.1991
2. C.R.Wilie & L.C.Barrett: Advanced Engineering Mathematics, MGH Co.
References:
1. Ervin Kreyszig, Wiley Eastern - Advanced Engineering Mathematics
2. Churchill R.V- Complex Variables & Applications: MGH Publishers.
3. M.C.Potter - Advanced Engineering Mathematics, , J.L.Goldberg Oxford University
Press
Type of questions for University Examination
Question 1 - 8 short answer questions of 5 marks each. 2 questions from each module
Question 2-5 – There will be two choices from each module .Answer one question from each module of
15 marks
CUSAT B.Tech Degree Course – Scheme of Examinations & Syllabus 2006 CS Sem IV
2
CS/EB/EC/EI 402 MICROPROCESSORS
Module 1
Introduction to 8 bit microprocessor: Microcomputers and microprocessors, 8/ 16/ 32/ 64-
bit microprocessor families; Internal architecture of Intel 8085 microprocessor: Block
diagram, Registers, Internal Bus Organization, Functional details of pins, Control signals,
External Address / Data bus multiplexing, Demultiplexing, I/ O mapped I/ O, and
memory mapped I/ O techniques.Interrupts, Serial communication and DMA features
Module 2
Assembly Language Programming: 8085 instruction set: Instructions, Classifications,
Addressing modes, Stack and Subroutines, Delay routines, Counters etc. Programming
examples.
Module 3
Instruction Timing and Interrupts: Timing Diagrams (of various instructions): T- state,
Machine cycle (Opcode fetch, Read / Write, Interrupt Acknowledge, Bus Idle, etc),
Interrupts: -types (h/ w and s/ w), Maskable / Non maskable, their organization.
Module 4
Interfacing concepts and devices:
Memory interface: Concept of memory chip/ chips interface to 8085 with appropriate
examples
Programmable interfacing devices: - Programmable peripheral interface (Intel 8255),
Programmable timer interface (Intel 8253/ 54), Programmable display / Keyboard
interface (Intel 8279), Programmable serial communication interface (Intel 8251)-(their
architecture, register orga nization, initialization, hard ware and software inter face to
8085.
Text Books:
1. Ghosh and Sridhar: 0000 to 8085 Microprocessors for Engineers and Scientists
2. Gaonkar: Microprocesors, Architecture, Programming and Applications.
References:
1. Nagoor Kani, Microprocessors, architecture and programming, RBA Publications,
2004
2. Douglas V. Hall , Microprocessors, Interfacing and Peripherals, Tata McGraw
Hill,2nd ed.
3. S. P. Chowdhuray, Sunetra Chowdhuray, Microprocessors and Peripherals,
SCITECH, 2004
Type of questions for University Examination
Question 1 - 8 short answer questions of 5 marks each. 2 questions from each
module
Question 2-5 – There will be two choices from each module .Answer one question
from each module of 15 marks
CUSAT B.Tech Degree Course – Scheme of Examinations & Syllabus 2006 CS Sem IV
3
CS 403 COMPUTER ARCHITECTURE & ORGANISATION
Module 1
Basic structure of computers – Functional units – Basic operational concepts – Bus
structures – Instructions & instruction sequencing. Hardware and software - Addressing
modes – Assembly language – Stacks &Subroutines
Module 2
Processing Unit – Fundamental concepts – Execution of a complete instruction -
Hardwired control unit- micro programmed control - control signals - microinstructionsmicro
program sequencing- Branch address modification- Pre-fetching of micro
instructions- Emulation.
Computer arithmetic - logic design for fast adders - multiplication - Booth’s algorithm -
Fast multiplication - integer division - floating point numbers and operations.
Module 3
Memory organization-Semiconductor RAM memories- internal organization of memory
chips- Static and Dynamic memories - cache memories - mapping functionsreplacement
algorithms - virtual memory - address translations – performance
considerations – interleaving - Secondary storage.
Module 4
Input-output organizations - interrupts – Enabling & Disabling interrupts - handling
multiple devices - device identification - vectored interrupts - interrupt nesting –
Simultaneous requests – DMA - Buses - I/O interface circuits –Standard I/O interfaces.
Text Books:
1. Hamacher C. V., “Computer Organisation – International Edition -5th Edition”,
Mc.Graw Hill, NewYork
2. Stallings William, “Computer Organization and Architecture”,6th Edition, Pearson
Education ,2003
References:
1. Pal Chaudhary P, “Computer Organisation and Design “ , Prentice Hall, New Delhi,
2. Hayes J P , “Computer Organisation and Architecture - 2nd Edition “, Mc Graw Hill,
3. Tanenbaum A S , ”Structured Computer Organisation - 3rd Edition”, Prentice Hall,
4. Behrooz Parhami, Computer Architecture from Microprocessors to Supercomputers
Oxford Indian Edition
5. Kai Hwang & Faye A Briggs “Computer Archtecture and Parallel Processing
“Mc.Graw Hill.,NewYork –1985
6. D.A Pattersen and J.L Hennesy ,”Computer Organization and Design: The
hardware/software Interface 2nd Edition”, Harcourt Asia private Ltd. (Morgan
Kaufman),Singapore 1998
Type of questions for University Examination
Question 1 - 8 short answer questions of 5 marks each. 2 questions from each module
Question 2-5 – There will be two choices from each module .Answer one question from each module of
15 marks
CUSAT B.Tech Degree Course – Scheme of Examinations & Syllabus 2006 CS Sem IV
4
CS/IT 404 AUTOMATA LANGUAGES AND COMPUTATION
Module 1
Finite state systems NFA DFA, Equivalence of NFA and DFA, Equivalence of NFA and
NFA with epsilon moves, regular expression, Equivalence of regular expression and
finite automata, Finite automata with output associated with state, Finite automata with
output associated with transition, Equivalence of finite automata with output, applications
of Finite automata, Pumping Lemma , closure properties of Regular sets, Decision
algorithms , My Hill Nerode theorem ,minimization of DFA
Module 2
Context Free grammars derivations parse Trees, ambiguity Simplification
CNF,GNF,PDA DPDA, equivalence of PDA and CFL, pumping lemma for CFL, Closure
Properties, decision algorithms, CYK algorithm
Module 3
Turing machine, Techniques for construction of TM , storage in finite control, multiple
tracks ,shifting over ,checking of symbols ,subroutines, NDTM , undecidability, universal
TM
Module 4
Recursive and recursively enumerable languages, Properties, halting problem of TM
Chomsky Hierarchy ,equivalence of regular grammar and FA , equivalence of
unrestricted grammar and TM , equivalence of LBA and CSL relation between
languages
Text Books:
1. J E Hopcroft and J D Ullman Introduction to Automata Theory and Languages and
Computation, Addison Wesley
2. Michael Sipser, Introduction to the Theory of Computation, Thomson Learning
References:
1. Misra and Chandrasekharan, Theory of Computation, Prentice Hall
2. H R Lewis Papadimitrou, Elements of Theory of Computation PHI
3. John Martin, Introduction to Language and Theory of Computation, TMH
4. Peter Linz, An Introduction to Formal Languages and Automata Narosa Publucation
Type of questions for University Examination
Question 1 - 8 short answer questions of 5 marks each. 2 questions from each module
Question 2-5 – There will be two choices from each module .Answer one question from each module of
15 marks
CUSAT B.Tech Degree Course – Scheme of Examinations & Syllabus 2006 CS Sem IV
5
CS/IT 405 DATA STRUCTURES & ALGORITHMS
Module 1
Introduction to Data structures - Arrays & sparse matrices – representation, Searching -
linear, binary, Fibonacci – Sorting – selection, bubble, insertion, quick, merge, heap,
Introduction to external sorting, Hash tables – Hashing functions
Module 2
Linked lists – singly, doubly and circular lists, Application of linked lists – Polynomial
manipulation, Stacks – Implementation of stacks using arrays and lists – Typical
problems – Conversion of infix to postfix – Evaluation of postfix expression . Queues &
Deques – implementation., priority queues
Module 3
Trees, Definition and mathematical properties. Representation – sequential, lists - Binary
trees – Binary tree traversals – pre-order, in-order & post-order, Expression trees .
Threaded binary trees . Binary Search trees . AVL trees
Module 4
Graphs – Graph representation using adjacency matrices and lists – Graph traversals –
DFS, BFS - shortest path – Dijkstra’s algorithm, Minimum spanning tree – Kruskal
Algorithm, prims algorithm – Binary search, B trees and B+ trees.
Text Book:
1. Michael Waite and Robert Lafore, “Data Structures and Algorithms in Java” ,
Techmedia, NewDelhi, 1998.
2. Adam drozdek,” Data Structures and Algorithms in Java” ,Thomson Publications,
2nd Edition.
3. Sartaj Sahni, 'Data Structures, Algorithms, and Applications in Java", McGraw-Hill
References:
1. Aaron M.Tanenbaum, Moshe J.Augenstein, “Data Structures using C”, Prentice
Hall InternationalInc., Englewood Cliffs, NJ, 1986
2. Ellis Horowitz and Sartaj Sahni, “ An introduction to Data Structures”, Computer
Science Press,Rockville, MA, 1984
3. Mark Allen Weiss, “Data Structures and Algorithm Analysis in C++”,
Benjamin/CummingsPublishing Company Inc., Redwood City, CA, 1991
4. Jean Paul Tremblay and Paul G Sorenson, “An introduction to Data Structures with
Applications”,McGraw-Hill, Singapore, 1984
Type of questions for University Examination
Question 1 - 8 short answer questions of 5 marks each. 2 questions from each module
Question 2-5 – There will be two choices from each module .Answer one question from each module of
15 marks
CUSAT B.Tech Degree Course – Scheme of Examinations & Syllabus 2006 CS Sem IV
6
CS/IT 406 DATA COMMUNICATION
Module 1
Data transmission: Communication model-Data Transmission: Concepts and
Terminology- Analog and Digital Data Transmission- Transmission Impairments-
Guided transmission media- Wireless Transmission- Line-of-sight Transmission. Channel
Capacity-Band width and Shannon’s capacity equation
Module 2
Signal Encoding Techniques: Digital Data,Digital Signals:-Unipolar. Polar: NRZ-RZBiphase-
Manchester-Differential Manchester. Bipolar: AMI-B8ZS-HDB3.
Digital Data, Analog Signals:-Aspects of Digital to Analog Conversion: Bit rate and
Baud rate-Constellation pattern. ASK-FSK-PSK-QPSK-QAM-Bandwidth of
ASK,FSK,PSK and QAM.
Modems-Types of modem-Modem standards
Analog Data, Digital Signals:- Sampling principles-Quantization-Nyquist Theorem.
PAM-PCM-Delta Modulation
Analog Data, Analog Signals:-AM-FM-PM-Bandwidth of AM,FM and PM.
Data Compression:- Frequency dependent coding-Huffman coding-LZW Coding
Module 3
Digital Data Communication Techniques: Asynchronous and Synchronous Transmission-
Types of Errors-single bit and burst errors-Error Detection: Redundancy- LRC-VRCCRC-
Capabilities and performance of CRC-Error Correction: single bit error correction –
Hamming code- Burst error correction-convolution code.
Data Link Control: Line discipline-Flow control-Error control: ARQ-stop and wait ARQContinuous
ARQ-Line utilization of different ARQs-Link management-HDLC
Module 4
Multiplexing: Frequency-Division Multiplexing-Synchronous Time-Division
Multiplexing-Statistical Time-Division Multiplexing-Asymmetric Digital Subscriber
Line-xDSL
Spread Spectrum: The Concept of Spread Spectrum-Frequency Hopping Spread
Spectrum-Direct Sequence Spread Spectrum-Code-Division Multiple Access
Text Books:
William Stallings, Data and Computer Communication, 8/e ,Pearson education,2006.
References:
1. Behrouz A. Forouzan, Data Communication and Networking 4/e, TMH,2006.
2. Fred Halsal, Data Communication Computer Network and Open Systems, 4/e,
Person education ,2005.
3. William A. Shay, Understanding Data Communication & Networks, 2/e, Thomson
Learning,2003
4. James Irvin & David Harle, Data communication and Networks: an Engineering
approach, Wiley,2006.
Type of questions for University Examination
Question 1 - 8 short answer questions of 5 marks each. 2 questions from each module
Question 2-5 – There will be two choices from each module .Answer one question from each module of
15 marks
CUSAT B.Tech Degree Course – Scheme of Examinations & Syllabus 2006 CS Sem IV
7
CS/EB/EC/EE/EI 407 DIGITAL ELECTRONICS LABORATORY
1. Half adder and full adder using NAND gates.
2. Code converters - Binary to Gray and gray to Binary using mode control
3. Binary addition and subtraction (a) 1's complement (b) 2's complement(using 7483)
4. BCD adder using 7483.
5. Study of MUX, DeMUX &Decoder Circuits and ICs
6. Set up R-S & JK flip flops using NAND Gates
7. Asynchronous UP / DOWN counter using JK Flip flops
8. Design and realization of sequence generators.
9. Study of shift registers and Implementation of Johnson and Ring counter using it.
10. Study of IC counters 7490, 7492, 7493 and 74192 or the CMOS equivalent.
11. Astable and monostable multi- vibrators using TTL gates.
12. Transfer characteristics and specifications of TTL gates
Note: 50% Marks is earmarked for continuous evaluation and 50% marks for end
semester examination to be assessed by two examiners. A candidate shall secure a
minimum of 50% marks separately for the two components to be eligible for a pass
in that subject.
CUSAT B.Tech Degree Course – Scheme of Examinations & Syllabus 2006 CS Sem IV
8
CS/IT 408 DATA STRUCTURES LABORATORY
1. Simple programming exercises in Java
2 Study of algorithms and implementation in Java programming language for the
following:
Searching and Sorting
Linked Lists- Singly and doubly
Stacks – various applications
Queues
Trees
Graphs
Note: 50% Marks is earmarked for continuous evaluation and 50% marks for end
semester examination to be assessed by two examiners. A candidate shall secure a
minimum of 50% marks separately for the two components to be eligible for a pass
in that subject.

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